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Toshiba GRD150 Series Instruction Manual page 89

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6 F 2 S 0 8 4 2
Hz
Δ f
Δ t
sec
Figure 2.3.2
Frequency Rate-of-Change Element
Scheme Logic
Figure 2.3.3 shows the scheme logic of frequency protection in stage 1. The frequency element
FRQ1 can output a trip command under the condition that the system voltage is higher than the
setting of the undervoltage element FVBLK (FVBLK=1). The FRQ1 element is programmable for
underfrequency or overfrequency operation by the scheme switch [FRQ1EN].
The tripping can be disabled by the scheme switches [FRQ1EN] or PLC logic signal FRQ1
BLOCK.
The stage 2 (FRQ2) to stage 6 (FRQ6) are the same logic of FRQ1.
Figure 2.3.4 shows the scheme logic of frequency rate-of-change protection in stage 1. The
frequency rate-of-change element DFRQ1 can output a trip command under the condition that the
system voltage is higher than the setting of the undervoltage element FVBLK (FVBLK=1). The
DFRQ1 element is programmable for frequency decay rate or frequency rise rate operation by the
scheme switch [DFRQ1EN].
The tripping can be disabled by the scheme switches [DFRQ1EN] or PLC logic signal DFRQ1
BLOCK.
The stage 2 (DFRQ2) to stage 6 (DFRQ6) are the same logic of DFRQ1.
88

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