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2.2.2.2 Definite Time Undervoltage Protection
UV2 element is used for definite time undervoltage protection.
Scheme Logic
As shown in Figure 2.2.8, UV2 gives trip signal UV2 through delayed pick-up timer TUV2. The
UV2 trip can be blocked by incorporated scheme switch [UV2EN] and PLC logic signal UV2
BLOCK.
208, 1900
1(∗)
209, 1901
UV2 2(∗)
210, 1902
3(∗)
[OV2EN]
+
"ON"
NON UVBLK
1589
UV2 BLOCK
Figure 2.2.8
2.2.2.3 Setting
The table shows the setting elements necessary for the undervoltage protection and their setting
ranges.
Element
Range
UV1
5.0 – 130.0 V
TUV1P
0.05– 100.00
TUV1D
0.00 – 300.00 s
TUV1R
0.0 – 300.0 s
UV2
5.0 – 130.0 V
TUV2
0.00 – 300.00 s
VBLK
5.0 - 20.0 V
[UV1EN]
Off / DT / IDMT
[VBLKEN]
Off / On
[UV2EN]
Off / On
673
&
&
674
&
&
675
&
&
1
( ∗ )Note : Phases 1, 2 and 3 are replaced with the followings:
Phase
1
2
3
Definite Time Undervoltage Protection (UV2)
Step
Default
0.1 V
60.0 V
0.01
1.00
0.01 s
1.00 s
0.1 s
0.0 s
0.1 V
40.0 V
0.01 s
1.00 s
0.1 V
10.0 V
DT
Off
Off
⎯
⎯
81
TUV2
0
t
0
t
t
0
0.00 - 300.00s
[APPL-VT] setting
2PP
3PN, 3PV
A - B phase
A phase
B - C phase
B phase
C phase
－
Remarks
UV1 threshold setting
UVI-I time multiplier setting. Required if [UV1EN] = IDMT.
UV1-D definite time setting. Required if [UV1EN] = DT.
UV1-I definite time delayed reset.
UV2 threshold setting.
UV2 definite time setting.
Undervoltage block threshold setting.
UV1 Enable
UV block Enable
UV2 Enable
6 F 2 S 0 8 4 2
471
UV2-1 ALARM
472
UV2-2 ALARM
473
UV2-3 ALARM
470
≥ 1
UV2 ALARM
3PP
A - B phase
B - C phase
C - A phase
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