Alinx ZYNQ UltraScale+ User Manual page 5

This MPSoCs FPGA development platform adopts the core board + carrier
board mode, which is convenient for users to use the core board for secondary
development. The core board uses XILINX Zynq UltraScale+ EG chip ZU9EV
solution, uses Processing System(PS)+Programmable Logic(PL) technology to
integrate dual-core ARM ARM Cortex-A53 and FPGA programmable logic on a
single chip. In addition, the PS side of the core board has 4 pieces of 1GB
high-speed DDR4 SDRAM chips, 1 piece of 8GB eMMC memory chip and 1
piece of 256Mb QSPI FLASH chip; the PL side of the core board has 2 pieces
of 1GB DDR4 SDRAM chip
In the design of carrier board, we have extended a wealth of interfaces for
users, such as 1 FMC LPC interface, 1 SATA M.2 interface, 1 DP interface, 1
PCIe x 2.0, 4 USB 3.0 Interface, 2 Gigabit Ethernet interfaces, 1 HDMI Output,
1 HDMI Input, 2 Uart, 1 SD card slot, 2-Channel CAN bus interfaces,
2-Channel RS485 bus interfaces, 1 MIPI Camera Interface. It meets users'
requirements for high-speed data exchange, data storage, Video transmission
processing, deep learning, artificial intelligence and industrial control. It is a
"professional" ZYNQ development platform. For high-speed data transmission
and exchange, pre-verification and post-application of data processing is
possible. This product is very suitable for students, engineers and other groups
engaged in MPSoCs development.
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ZYNQ Ultrascale + FPGA Board AXU9EG User Manual
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