Part 3.9: Can Communication Interface - Alinx ZYNQ UltraScale+ User Manual

SFP2_TX_N 228_TX0_N
SFP2_TX_P 228_TX0_P
SFP2_RX_N 228_RX0_N
SFP2_RX_P 228_RX0_P
SFP1_TX_DIS B50_L8_N
SFP2_TX_DIS B50_L7_N
SFP1_LOSS B50_L8_P
SFP2_LOSS B50_L7_P

Part 3.9: CAN Communication Interface

There are 2 CAN communication interfaces on the AXU15EG carrier board,
which are connected to the MIO interface of the BANK501 on the PS system
side. The CAN transceiver chip selected TI's SN65HVD232C chip for user CAN
communication services. The connection of the CAN transceiver chip on the
PS side is show as Figure 3-9-1
Figure 3-9-1: Connection diagram of CAN transceiver chip on PS side
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ZYNQ Ultrascale + FPGA Board AXU9EG User Manual
R3
R4
T1
T2
G13
H12
H13
J12
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Optical Module 2 Data Transmit Negative
Optical Module 2 Data Transmit Positive
Optical Module 2 Data Receive Negative
Optical Module 2 Data Receive Positive
Optical Module 1 Light Emission Prohibited,
High Level (Positive) Enable
Optical Module 2 Light Emission Prohibited,
High Level (Positive) Enable
Optical Module 1 Receive LOSS
Detect Signal
Optical Module 2 Receive LOSS
Detect Signal