Part 2.4: Qspi Flash - Alinx ZYNQ UltraScale+ User Manual

Fpga development board
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PL_DDR4_DM1
PL_DDR4_DM2
PL_DDR4_DM3
PL_DDR4_A0
PL_DDR4_A1
PL_DDR4_A2
PL_DDR4_A3
PL_DDR4_A4
PL_DDR4_A5
PL_DDR4_A6
PL_DDR4_A7
PL_DDR4_A8
PL_DDR4_A9
PL_DDR4_A10
PL_DDR4_A11
PL_DDR4_A12
PL_DDR4_A13
PL_DDR4_BA0
PL_DDR4_BA1
PL_DDR4_RAS_B
PL_DDR4_CAS_B
PL_DDR4_WE_B
PL_DDR4_ACT_B
PL_DDR4_CS_B
PL_DDR4_CKE
PL_DDR4_OTD
PL_DDR4_BG0
PL_DDR4_CLK_N
PL_DDR4_CLK_P
PL_DDR4_RST

Part 2.4: QSPI Flash

The FPGA core board ACU9EG is equipped with two 256MBit Quad-SPI
FLASH chip to form an 8-bit bandwidth data bus, the flash model is
MT25QU256ABA1EW9, which uses the 1.8V CMOS voltage standard. Due to
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ZYNQ Ultrascale + FPGA Board AXU9EG User Manual
IO_L13P_T2L_N0_GC_QBC_65
IO_L7P_T1L_N0_QBC_AD13P_65
IO_L1P_T0L_N0_DBC_65
IO_L5P_T0U_N8_AD14P_64
IO_L16P_T2U_N6_QBC_AD3P_64
IO_L10P_T1U_N6_QBC_AD4P_64
IO_L15P_T2L_N4_AD11P_64
IO_L11P_T1U_N8_GC_64
IO_L10N_T1U_N7_QBC_AD4N_64
IO_L3N_T0L_N5_AD15N_64
IO_L7P_T1L_N0_QBC_AD13P_64
IO_L11N_T1U_N9_GC_64
IO_L4N_T0U_N7_DBC_AD7N_64
IO_L14P_T2L_N2_GC_64
IO_L8N_T1L_N3_AD5N_64
IO_L15N_T2L_N5_AD11N_64
IO_L7N_T1L_N1_QBC_AD13N_64
IO_L6P_T0U_N10_AD6P_64
IO_L5N_T0U_N9_AD14N_64
IO_L4P_T0U_N6_DBC_AD7P_64
IO_L16N_T2U_N7_QBC_AD3N_64
IO_L9P_T1L_N4_AD12P_64
IO_L8P_T1L_N2_AD5P_64
IO_L17N_T2U_N9_AD10N_64
IO_L6N_T0U_N11_AD6N_64
IO_L9N_T1L_N5_AD12N_64
IO_L3P_T0L_N4_AD15P_64
IO_L13N_T2L_N1_GC_QBC_64
IO_L13P_T2L_N0_GC_QBC_64
IO_L14N_T2L_N3_GC_64
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AE5
AH7
AE10
AN9
AN6
AN7
AP5
AK8
AP7
AM10
AN8
AK7
AP10
AM6
AM8
AP4
AP8
AJ10
AP9
AP11
AP6
AJ9
AM9
AN4
AK10
AK9
AL10
AL5
AL6
AM5

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