Memory Load Through Dcc - Siemens SINAMICS DCM Operating Instructions Manual

Descriptions of functions
10.33 Drive Control Chart (DCC)
Notes
● The actual CPU time load of the CUD can be read out on r9976. Please refer to the "CPU
● To make own calculations, the above-illustrated CPU time loads can be taken as "linear".
Examples
1. In the 1 ms time slice, 50 blocks generate about 30 % additional CPU time load. For that
2. In the 7 ms time slice, (300 + 400) / 2 = 350 blocks generate about 30 % additional CPU
10.33.3

Memory load through DCC

Along with the CPU time load, the memory load of the processor must also be considered
when designing a closed loop control with the DCC technology option. A higher number of
configured DCC blocks and @parameters also more highly loads the internal memory
(ROM) of the CUD.
For using DCC, on the SINAMICS DCM, as compared with the maximum possible
configurations documented in the "Maximum configuration" chapter, depending on the size
of the diagram, one must omit optional components. The number of blocks and the
@parameters are decisive.
For one CUD without additional options, the following rules apply:
Table 10- 37 Maximum number of DCC blocks and @parameters
Drive object
CU_DC
DC_CTRL
Note:
The specified maximum numbers for blocks and @parameters always apply for the entire
drive unit and should be regarded as guide values. The CUD is completely utilized with 800
DCC blocks and @parameters on the DO CU_DC or 600 DCC blocks and @parameters on
the DO DC_CTRL. Conserving @parameters has little effect on the quantity structure of the
blocks; the specified maximum numbers for the blocks should therefore not be exceeded.
On the DO DC_CTRL, due to the large number of drive parameters, fewer DCC blocks can
be computed than on the DO CU_DC.
504
time load with the SINAMICS DCM" chapter for more information about the CPU load on
the SINAMICS DCM.
This means that:
– half as many blocks in the same time slice generate half as much CPU time load, etc.
– the same number of blocks in time slices half as fast generate half as much CPU time
load, etc.
reason, 50 blocks in the 2 ms time slice generate about 30 % × 0.5 = 15 % additional
CPU time load.
time load. That means 250 blocks generate 250 / 350 × 30 % = 21.5 % additional CPU
time load.
Number of DCC blocks and @parameters
800
600
Operating Instructions, 1.2012, C98130-A7066-A1-05-7619
SINAMICS DCM DC Converter