Lnldo - Infineon Cypress WICED CYW43903 Manual

15.4 LNLDO

Table 28. LNLDO Specifications
Specification
Input supply voltage, Vin
Output current
Output voltage, V
o
Dropout voltage
Output voltage DC
accuracy
Quiescent current
Line regulation
Load regulation
Leakage current
Output noise
PSRR
LDO turn-on time
External output capacitor,
C
o
External input capacitor
1. Minimum capacitor value refers to the residual capacitor value after taking into account the part-to-part tolerance, DC-bias, temperature, and aging.
Document Number: 002-14826 Rev. *G
PRELIMINARY
Min. V = V + 0.15V = 1.35V (where V
IN O
requirement must be met under maximum load.
–
Programmable in 25 mV steps. Default = 1.2V.
At maximum load.
Includes line/load regulation.
No load.
Max. load.
V from (V + 0.1V) to 1.5V, 150 mA load.
in o
Load from 1 mA to 150 mA.
Power-down.
@30 kHz, 60–150 mA load C
load
C = 2.2 µF.
o
@ 1kHz, Input > 1.35V, C
o
LDO turn-on time when the rest of the chip is up.
Total ESR (trace/capacitor): 5 mΩ–240 mΩ.
Only use an external input capacitor at the LDO_VDD1P5 pin if it is
not supplied from the CBUCK output. Total ESR (trace/capacitor): 30
mΩ–200 mΩ.
Notes
= 1.2V)dropout voltage
O
= 2.2 µF. @100 kHz, 60–150 mA
o
= 2.2 µF, V = 1.2V.
o
CYW43903
Min. Typ. Max.
1.3 1.35 1.5 V
0.1 – 150 mA
1.1 1.2 1.275 V
– – 150 mV
–4 – +4 %
– 44 – µA
– 970 990 µA
– – 5 mV/V
– 0.02 0.05 mV/
mA
– – 10 µA
– – 60 nV/rt
35 Hz nV/
rt Hz
20 – – dB
– 140 180 µs
2.2 4.7 µF
1
0.5
– 1 2.2 µF
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