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SLM-3650 Satellite Modem
Theory of Operation
4.3.2
Theory of Operation
The demodulator functions as an advanced, digital, coherent-phase-lock receiver and
decoder. Demodulator faults are also reported to the front panel. The demodulator
consists of the following basic subsections.
•
Digital Costas Loop
•
RF Section
•
Automatic Gain Control
•
Analog-to-Digital (A/D) Converter
•
Soft Decision Mapping
•
Programmable Vector Rotation
•
Digital Nyquist Filters
•
FEC Decoder
•
Digital Clock Recovery Loop
•
Decoder
The modulated IF signal at 50 to 180 MHz enters the RF module for conversion to an IF
frequency. The IF is then sampled by an A to D converter and digitally demodulated. The
I and Q data is then sent to the digital Nyquist filters, resulting in a filtered, digital
representation of the received signal. The digital data is then sent to four separate circuits:
•
Automatic Gain Control
•
Carrier Recovery (Costas) Loop
•
Clock Recovery Loop
•
Soft Decision Mapping
The AGC provides a gain feedback signal to the RF section. This closed loop control
ensures that the digital representation of the I and Q channels is optimized for the Costas
and Clock loops, as well as the soft-decision mapping circuitry.
When the active decoder determines that the modem is locked, the M&C stops the sweep
and begins the de-stress process. This involves fine tuning the DDS based on the phase
error in the Costas loop. The de-stress process continues as long as the modem is locked.
If the carrier is interrupted, the M&C resumes the sweep process.
The digital Costas loop, in conjunction with a Direct Digital Synthesizer (DDS), performs
the carrier recovery function. The Costas loop consists of a Costas phase detector, loop
filter, and DDS, all implemented digitally. The DDS performs the function of a
Voltage-Controlled Oscillator (VCO) in an analog implementation, but can be easily
programmed to the desired center frequency via the M&C. The output of the DDS is sent
to the RF module and provides the reference to which the local oscillator is locked. The
M&C sweeps the local oscillator (via DDS programming) through the user-specified
sweep range.
The digital clock loop, in conjunction with another DDS, performs the clock recovery
function. The clock loop consists of a phase detector, loop filter, and DDS, all
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Revision 3
MN/SLM3650.IOM
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