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SLM-3650 Satellite Modem
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A.3.4
Decoder
A.3.4.1
Correlator
On the receive side (decoder), the correlator searches for the unique words of the RS
frame. The correlator starts in hunt mode searching for the first two bytes of the unique
word. Upon detection of the first two bytes of the unique word, the correlator searches for
the next two bytes of the unique word. When all four bytes of the unique word are found,
an up/down counter is incremented. The correlator acknowledges a locked condition
when the up/down counter reaches a maximum count of 16.
Once the counter starts counting up, a missing byte of the unique word causes the counter
to count down. The counter must count down to zero before again entering hunt mode,
offering some compliance for noise in the system.
After a locked condition is reached, the correlator uses the known frame sync position to
synchronize the counters that generate the de-interleaver addresses, W/R selects, and the
descrambler synchronization. The correlator converts the input data stream to an 8-bit
parallel byte format for processing by the deinterleaver and RS decoder.
The RS rate exchange is performed by the RS Xilinx using the system 25 MHz clock. The
receive clock is converted to a series of 40nS pulses at the receive data rate. To generate the
demux (Non-RS overhead rate) pulses are removed from the receive clock using the RS n,
k, t values programmed into the Xilinx.
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Figure A-22. RS Codeword Format
A–75
Revision 3
MN/SLM3650.IOM
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