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M&C and Interfaces
INTF_LBk
Coding
TX_2047
TXD_Flt
RXD_Flt
Buf_Size
Read_ERR
Dscrmblr
Scramblr
4.1.2.8 Utility Defaults
POW ADJ
OP MODE
Fast_ACQ
Note: If Battery backed RAM fails the valid data test time and date are set as follows:
Date
Time
4.1.3 Remote Interface Specification
Refer to Appendix B for the remote interface specification.
4.1.4 Monitor and Control Theory of Operation
The Monitor and Control module is built around the Intel 80C31 microcontroller
operating at 5.5295 MHz. The microsystem is designed to support 64K bytes of read
only code memory and 64K bytes of random access data memory. Of the 64K bytes data
memory only 4K is used for RAM, the remaining address is used for memory mapped
I/O. Memory mapped I/O includes real time clock/memory, a eight channel analog to
digital converter and external buffered bus structure for overall modem control and status
gathering. The 80C31 microcontroller supports a serial asynchronous communications
channel with a maximum baud rate of 9600bps using the 5.5295 MHz reference. A
rechargeable battery is employed to maintain the system real time clock and modem
configuration through power out situations.
4.2 Digital Interfaces
4-4–6
Interface Loop Back [OFF]
[AMI]
[OFF]
[NONE]
[NONE]
[384]
[FRAME]
Descrambler [ON]
Scrambler [ON]
Power Adjust [-5.0 dBm]
Operation Mode [Duplex]
Fast Acquisition [OFF]
7/4/76
12:00AM
SDM-309B Satellite Modem
MN/U-SDM309B Rev. #
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