Xilinx AC701 User Manual page 48

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Chapter 1:
AC701 Evaluation Board Features
The character display runs at 5.0V and is connected to the FPGA 3.3V HP bank 14 through a TI
TXS0108E 8-bit bidirectional voltage level translator (U45).
circuit.
X-Ref Target - Figure 1-27
FPGA_3V3
C473
0.1μF 25V
X5R
GND
2
LCD_E_LS
1
LCD_RW_LS
3
LCD_DB4_LS
4
LCD_DB5_LS
5
LCD_DB6_LS
6
LCD_DB7_LS
7
LCD_RS_LS
8
NC
9
10
The AC701 board base board uses a male Samtec MTLW-107-07-G-D-265 2x7 header (J23) with
0.025 inch square posts on 0.100 inch centers for connecting to a Samtec SLW-107-01-L-D female
socket on the LCD display panel assembly. The LCD header shown in
X-Ref Target - Figure 1-28
Low Profile Socket
Samtec SLW-107-01-L-D
Low Profile Terminal
Samtec MTLW-107-07-G-D-265
48
Send Feedback
U45
TXS0108E 8-Bit
Bidirectional
Voltage Level
Translator
19
VCCA
VCCB
20
A1
B1
18
A2
B2
17
A3
B3
16
A4
B4
15
A5
B5
14
A6
B6
13
A7
B7
12
NC
A8
B8
11
OE
GND
GND
LCD_DB7
LCD_DB5
LCD_E
LCD_RS
GND
Figure 1-27: LCD Interface Circuit
Figure 1-28: LCD Header Details
www.xilinx.com
VCC5V0
C472
0.1μF 25V
X5R
GND
LCD_E
LCD_RW
LCD_DB4
LCD_DB5
LCD_DB6
LCD_DB7
LCD_RS
VCC5V0
J23
1
2
LCD_DB6
LCD_DB4
3
4
NC
5
6
NC
NC
7
8
NC
9
10
LCD_RW
11
12
LCD_VEE
13
14
LCD Display Assembly
10 mm
PWA
Figure 1-27
shows the LCD interface
VCC5V0
R118
6.81kΩ
R232
LCD Contrast
2 kΩ
Potentiometer
GND
UG952_c1_25_100312
Figure
1-28.
UG952_c1_26_101812
AC701 Evaluation Board
UG952 (v1.4) August 6, 2019

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