Xilinx AC701 User Manual page 46

Chapter 1: AC701 Evaluation Board Features
Table 1-19
Table 1-19: FPGA to HDMI Codec Connections (ADV7511)
FPGA Pin (U1)
46
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lists the connections between the codec and the FPGA.
Schematic Net Name
AA24 HDMI_R_D4
Y25 HDMI_R_D5
Y26 HDMI_R_D6
V26 HDMI_R_D7
W26 HDMI_R_D8
W25 HDMI_R_D9
W24 HDMI_R_D10
U26 HDMI_R_D11
U25 HDMI_R_D16
V24 HDMI_R_D17
U20 HDMI_R_D18
W23 HDMI_R_D19
W20 HDMI_R_D20
U24 HDMI_R_D21
Y20 HDMI_R_D22
V23 HDMI_R_D23
AA23 HDMI_R_D28
AA25 HDMI_R_D29
AB25 HDMI_R_D30
AC24 HDMI_R_D31
AB24 HDMI_R_D32
Y22 HDMI_R_D33
Y23 HDMI_R_D34
V22 HDMI_R_D35
AB26 HDMI_R_DE
Y21 HDMI_R_SPDIF
V21 HDMI_R_CLK
AC26 HDMI_R_VSYNC
AA22 HDMI_R_HSYNC
W21 HDMI_INT
T20 HDMI_SPDIF_OUT_LS
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ADV7511 (U48)
I/O Standard
Pin
LVCMOS18 92
LVCMOS18 91
LVCMOS18 90
LVCMOS18 89
LVCMOS18 88
LVCMOS18 87
LVCMOS18 86
LVCMOS18 85
LVCMOS18 80
LVCMOS18 78
LVCMOS18 74
LVCMOS18 73
LVCMOS18 72
LVCMOS18 71
LVCMOS18 70
LVCMOS18 69
LVCMOS18 64
LVCMOS18 63
LVCMOS18 62
LVCMOS18 61
LVCMOS18 60
LVCMOS18 59
LVCMOS18 58
LVCMOS18 57
LVCMOS18 97
LVCMOS18 10
LVCMOS18 79
LVCMOS18 2
LVCMOS18 98
LVCMOS18 45
LVCMOS18 46
AC701 Evaluation Board
UG952 (v1.4) August 6, 2019
Pin Name
D4
D5
D6
D7
D8
D9
D10
D11
D16
D17
D18
D19
D20
D21
D22
D23
D28
D29
D30
D31
D32
D33
D34
D35
DE
SPDIF
CLK
VSYNC
HSYNC
INT
SPDIF_OUT