Program Flow And Branch Instructions - Intel PXA270 Optimization Manual

Intel XScale® Microarchitecture & Intel® Wireless MMX™ Technology Optimization
adds
The instructions that increment or decrement the loop counter can also modify the condition codes.
This eliminates the need for a subsequent compare instruction. A conditional branch instruction
can then exit or continue with the next loop iteration.
Consider the following C code segment.
for (i = 10; i!= 0; i--){
}
The optimized code generated for the preceding code segment would look like:
L6:
subs r3, r3, #1
bne
It is also beneficial to rewrite loops whenever possible to make the loop exit conditions check
against the value 0. For example, the code generated for the code segment below needs a compare
instruction to check for the loop exit condition.
for (i = 0; i < 10; i++){
}
If the loop were rewritten as follows, the code generated avoids using the compare instruction to
check for the loop exit condition.
for (i = 9; i >= 0; i--){
}
4.2.2

Program Flow and Branch Instructions

Branches decrease application performance by indirectly causing pipeline stalls. Branch prediction
improves performance by lessening the delay inherent to fetching a new instruction stream. The
Intel® PXA27x Processor Family (PXA27x processor) add a branch target buffer (BTB) which
helps mitigate the penalty due to branch misprediction. However, the BTB must be enabled.
The size of the branch target buffer limits the number of correctly predictable branches. Because
the total number of branches executed in a program is relatively large compared to the size of the
branch target buffer., it is often beneficial to minimize the number of branches in a program.
Consider the following C code segment.
int foo(int a) {
4-2
r2,r0,r1
do something;
.L6
do something;
do something;
Intel® PXA27x Processor Family Optimization Guide