Intel Xscale® Microarchitecture & Intel® Wireless Mmx™ Technology Optimization; Introduction; General Optimization Techniques; Conditional Instructions And Loop Control - Intel PXA270 Optimization Manual

Intel XScale® Microarchitecture & Intel®
Wireless MMX™ Technology
Optimization
4.1

Introduction

This section outlines optimizations specific to ARM* architecture and also to the Intel® Wireless
MMX™ Technology. These optimizations are modified for the Intel XScale® Microarchitecture
where needed. This chapter focuses mainly on the assembly code level optimization.
explains optimization during high level language programming.
4.2

General Optimization Techniques

The Intel XScale® Microarchitecture provides the ability to execute instructions conditionally.
This feature combined with the ability of the Intel XScale® Microarchitecture instructions to
modify the condition codes makes a wide array of optimizations possible.
4.2.1

Conditional Instructions and Loop Control

The Intel XScale® Microarchitecture instructions can selectively modify the state of the condition
codes. When generating code for if-else and loop conditions it is often beneficial to make use of
this feature to set condition codes, thereby eliminating the need for a subsequent compare
instruction.
Consider the following C statement
if (a + b)
Code generated for the if condition without using an add instruction to set condition codes is:
; Assume r0 contains the value a, r1 contains the value b,
; and r2 is available
add
cmp
However, code can be optimized as follows making use of add instruction to set condition codes:
; Assume r0 contains the value a, r1 contains the value b,
; and r2 is available
Intel® PXA27x Processor Family Optimization Guide
r2,r0,r1
r2, #0
4
Chapter 5
4-1