Taking Advantage Of Bus Parking; Dynamic Adaptation Of Weights - Intel PXA270 Optimization Manual

System Level Optimization
between DMA grants. For these reasons, the DMA controller never consumes all of the bus
bandwidth, even when programmed with a large weight. The best weight to use is system-
dependent, based on the number of DMA channels running and the bandwidth requirements of
those channels. Since the LCD controller and USB host have real-time requirements, DMA
bandwidth usually reduces the available bandwidth to the Intel XScale® core.
3.5.2.2.3 Weight for Core
A good method for setting the Intel XScale® core weight and the DMA controller weight is to
determine the ratio of the bandwidth requirements of both. Once the ratio is determined the weights
can be programmed with that same ratio. For instance, if the Intel XScale® core requires twice the
bandwidth of the DMA controller, the DMA weight could be set to two with the Intel XScale®
core weight set to four. Larger weights are used for greater accuracy, but the worst-case time to
grant also increases. It is often best to start with low weights while the LCD weight is high to avoid
LCD problems at this point. The weights can be increased using the same ratio if desired and there
are no LCD underruns.
3.5.2.3

Taking Advantage of Bus Parking

Another arbiter feature is the ability to park the grant on a particular client when the bus is idle. If
the bus is not parked and is idle, it takes 1-2 cycles to get a bus grant. This can be reduced to zero if
the bus is successfully parked on the next client that needs it. However, if the bus is parked on a
particular client and a different client requests the bus, it takes 2-3 cycles to get a grant. Consider
the 1-cycle penalty for a mispredicted park.
For most applications it is recommended to park the bus on the core. Since the bus parking can be
easily and dynamically changed, it is also recommended that the OS and applications use this
feature to park the bus where it results in the best performance for the current task.
While most applications have the highest performance with the bus parked on the Intel XScale®
core, some might perform better with different bus park settings. As an example, it is likely that
parking the bus on the memory controller will result in higher performance than having it parked
on the core if an application was invoked to copy a large section of memory from SDRAM. Use the
performance monitoring capabilities of the Intel XScale® core to verify that the choice of bus
parking resulted in increased performance.
3.5.2.4

Dynamic Adaptation of Weights

Once the initial weights for all of the programmable clients have been determined, the arbiter
settings should be tested with real system traffic. It is important to make sure all real-time
requirements are met with both typical and worst-case traffic loads. It may take several iterations to
find the best arbiter setting. Once the best ratio is determined, arbiter accuracy can be increased by
raising the DMA controller and Intel XScale® core weights as much as possible while still
preserving the ratio between the two. The system should be retested while increasing weights to
ensure the increase in worst-case time-to-grant does not affect performance. Also, LCD output
FIFO buffer underruns have to be monitored to make sure the LCD does not fail as it's bandwidth
allocation decreases. If worst-case time-to-grant is more important than arbiter accuracy, smaller
weights can be used and the LCD weight can be lowered as long as LCD output FIFO underruns do
not occur with a worst-case traffic load.
A final consideration is dynamically changing the ARBCNTL register based on the current state of
the system. For example, experimentation may show different DMA controller weights should be
used based on the number of channels running. When the system enables a new channel, the
ARBCNTL register can be written. This results in an immediate reload of the client counters.
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Intel® PXA27x Processor Family Optimization Guide