Source Mode - Logic Control; Setting Digital Output Lines; Figure 9-5 Nand Gate Control - Keithley 6220 Reference Manual

9-8 Limit Test and Digital I/O
Source mode — logic control
The digital outputs can be used as logic inputs to active TTL, low-power TTL, or
CMOS inputs. For this mode of operation, the output lines can source up to ~5mA.
Figure 9-5
the output line is set HI, the transistor will turn off (transistor switch open) to pro-
vide a reliable logic high output (>3.75V). When the output line is set LO, the tran-
sistor turns on (transistor switch closed) to route current to digital ground. As a
result, a low logic output (~0V) is provided at the output.
If the second input (B) of the NAND gate is connected to another output line of the
port, the output of the NAND gate will go to logic 0 when both digital outputs are
set HI.
Figure 9-5
NAND gate control

Setting digital output lines

Digital output lines are set by selecting a decimal value (0 to 15) that corresponds
to the 4-bit BCD pattern of the output. To determine the value, add up the decimal
weight values for the desired HI lines:
Output HI Line:
Decimal Weight:
For example, to set output lines 3 and 1 HI (0101 bit pattern), set the output value
to 5 (4 +1).
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shows how to connect a logic device to one of the output lines. When
Model 622x
W
Out 4 Out 3
8 4
Return to Section 9 topics
Model 6220/6221 Reference Manual
Logic
Device
Out 2 Out 1
2 1