Initialization - Intel 80C188EC User Manual

wdt_data segment
wdt_key DB
wdt_data ends
pcb_image segment
WDTCLR EQU
WDTCLR DW
pcb_image ends
wdt_code segment
assume cs:wdt_code
mov
mov
mov
mov
mov
mov
cld
mov
lock rep movsb
wdt_code ends
Example 12-2. Reload Sequence (Peripheral Control Block Located in Memory Space)

12.2.3 Initialization

The Watchdog Timer Unit is enabled following a reset. The initial value in the down counter is
0FFFFH. The system software must program or reload the Watchdog Timer within 65,535 clock
cycles of a reset to prevent the WDTOUT signal from being asserted.
Use the following sequence to initialize the Watchdog Timer:
1. Program the upper 16 bits of the WDT Reload Value (in the WDTRLDH register).
2. Program the lower 16 bits of the WDT Reload Value (in the WDTRLDL register).
3. Execute the appropriate LOCKed instruction sequence to reload the down counter and
lock accesses to the WDT Reload Value.
0AAH, 055H
XXXXH
?
ax, seg wdt_key
ds, ax
si, offset wdt_key
ax, seg WDTCLR
es, ax
di, offset WDTCLR
cx, 2
WATCHDOG TIMER UNIT
;image of PCB
;replace "XXXX" with appropriate
;offset from PCB+0.
;DS:SI = address of WDT reset value
;ES:DI = address of WDTCLR register
;clear direction flag (autoincrement)
;2 bytes in key
;LOCKed reload sequence
;The WDT down counter
;has been reloaded.
12-5