Intel 80C188EC User Manual page 303

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DIRECT MEMORY ACCESS UNIT
T
R
T
X
X
2
0
0
D
D
D
R
R
R
Q
Q
Q
Inter-Channel Arbitration
Internal Request Multiplexer
Channel 0
Module A
DRQ0
Like inter-channel priority, DMA module priority is set on a relative basis: one module may be
set higher than or equal to the other module.
Priority arbitration between modules is subject to the same rules as arbitration between channels.
When priority is fixed between modules (i.e., one module is set to a higher priority than the other),
the high-priority module continues to perform transfers as long as its DMA request is active, the
transfers have not been suspended or terminated and it has not released the bus.
The DMA modules rotate priority when both modules are set to the same priority. DMA module
B is initially set to high priority and module A is set to low priority. After a channel within a mod-
ule performs a transfer, the module is set to low priority.
10-14
BIU Request
Inter-Module
Arbitration
Logic
Module A
Request
and
Channel 1
DRQ1
Figure 10-8. 80C186EC/C188EC DMA Unit
R
X
1
D
R
Module B
Q
Request
Inter-Channel Arbitration
and
Internal Request Multiplexer
Channel 0
Channel 1
Module B
DRQ2
DRQ3
T
X
T
1
2
D
D
R
R
Q
Q
A1184-0A

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