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CHIP-SELECT UNIT
DRAM_BASEEQU
DRAM_SIZEEQU
DRAM_WAITEQU
;The GCS1# START and STOP register values are calculated using the above system
;constraints and the equations below
GCS1ST_VALEQU
GCS1SP_VALEQU
&
;I/O is selected using the GCS2# chip-select.
;16MHz.
The SIZE and BASE values must be modulo 64 bytes. For this example, the
;Floppy Disk Controller is connected to GCS2# and GCS0# provides the
;DACK# signal.
IO_SIZEEQU
IO_BASEEQU
IO_WAITEQU
DACK_BASEEQU
DACK_WAITEQU
;The GCS0# and GCS2# START and STOP register values are calculated using the
;above system contraints and the equations below.
GCS2ST_VALEQU
GCS2SP_VALEQU
&
GCS0ST_VALEQU
GCS0SP_VALEQU
;The following statements define the default assumptions for SEGMENT locations.
ASSUMECS:CODE
ASSUMEDS:DATA
ASSUMESS:DATA
ASSUMEES:DATA
CODE SEGMENT PUBLIC
;ENTRY POINT ON POWER UP:
;The power-on or reset code does a jump here after the UCS register is
;programmed.
FW_STARTLABEL
CLI
;Place register initialization code here
Example 6-1. Initializing the Chip-Select Unit (Continued)
6-18
128
;Window start address in Kbytes
512
;Window size in Kbytes
0
;Wait states (change to match
;system)
(DRAM_BASE SHL 6) OR (DRAM_WAIT)
(((DRAM_BASE) OR (DRAM_SIZE)) SHL 6) OR
(CSEN) OR (MEM)
64
;Size in bytes
256
;Start address in bytes
4
;Wait states
512
;DACK Address (used by DMA also)
0
;No need for DACK wait-states
;DACK Size assumed to be 64 bytes
((IO_BASE/64) SHL 6) OR (IO_WAIT)
(((IO_BASE/64) OR (IO_SIZE/64)) SHL 6) OR
(CSEN) OR (IO)
((DACK_BASE/64) SHL 6) OR (DACK_WAIT)
(((DACK_BASE/64) + 1) SHL 6) OR (CSEN) OR (IO)
'CODE'
FAR
;Forces far jump
;Make sure interrupts are
;globally disabled
Wait states assume operation at
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