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INPUT/OUTPUT PORTS
13.1.2 Output Port
Figure 13-2 shows the internal construction of an output port pin. An internal connection perma-
nently enables the three-state output driver. The Port Control latch selects the source of data for
the pin, which can be either the on-chip peripheral or the Port Data latch. The Port Direction bit
has no effect on an output-only pin; it can be used for storage.
13.1.3 Open-Drain Bidirectional Port
Figure 13-3 shows the internal control logic for the open-drain bidirectional port pin. The logic
is slightly different from that for the other port types. When the open-drain port pin is configured
as an output, clearing the Port Data latch turns on the N-channel driver, resulting in a "hard zero"
being present at the pin. A one value in the Port Data Latch shuts off the driver, resulting in a high
impedance (input) state at the pin. The open-drain pin can be floated directly by setting its Port
Direction bit.
The open-drain ports are not multiplexed with on-board peripherals. The port/peripheral data
multiplexer exists for open-drain ports, even though the pins are not shared with peripheral func-
tions. The open-drain port pin floats if the Port Control latch is programmed to select the non-
existent peripheral function.
13.1.4 Port Pin Organization
The port pins are divided into three functional groups: Port 1, Port 2 and Port 3. Most of the port
pins are multiplexed with peripheral functions.
13-3
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