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DIRECT MEMORY ACCESS UNIT
Register Name:
Register Mnemonic:
Register Function:
15
D
D
D
M
D
I
E
E
N
M
C
C
Bit
Bit Name
Mnemonic
DMEM
Destination
Address
Space
Select
DDEC
Destination
Decrement
DINC
Destination
Increment
SMEM
Source
Address
Space
Select
SDEC
Source
Decrement
SINC
Source
Increment
NOTE: Reserved register bits are shown with gray shading. Reserved bits must be written to a
logic zero to ensure compatibility with future Intel products. A pointer remains constant if
its increment and decrement bits are equal.
10-20
DMA Control Register
DxCON
Controls DMA channel parameters.
S
S
S
T
I
M
D
I
C
N
E
E
N
T
M
C
C
Reset
State
X
Selects memory or I/O space for the destination
pointer. Set DMEM to select memory space; clear
DMEM to select I/O space.
X
Set DDEC to automatically decrement the destination
pointer after each transfer. (See Note.)
X
Set DINC to automatically increment the destination
pointer after each transfer. (See Note.)
X
Selects memory or I/O space for the source pointer.
Set SMEM to select memory space; clear SMEM to
select I/O space.
X
Set SDEC to automatically decrement the source
pointer after each transfer. (See Note.)
X
Set SINC to automatically increment the source
pointer after each transfer. (See Note.)
Figure 10-13. DMA Control Register
S
S
P
I
Y
Y
D
N
N
R
1
0
Q
Function
0
C
S
W
H
T
O
G
R
R
T
D
A1180-0A
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