Table of Contents
Advertisement
CHAPTER 10
DIRECT MEMORY ACCESS UNIT
In many applications, large blocks of data must be transferred between memory and I/O space. A
disk drive, for example, usually reads and writes data in blocks that may be thousands of bytes
long. If the CPU were required to handle each byte of the transfer, the main tasks would suffer a
severe performance penalty. Even if the data transfers were interrupt driven, the overhead for
transferring control to the interrupt handler would still decrease system throughput.
Direct Memory Access, or DMA, allows data to be transferred between memory and peripherals
without the intervention of the CPU. Systems that use DMA have a special device, known as
the DMA controller, that takes control of the system bus and performs the transfer between mem-
ory and the peripheral device. When the DMA controller receives a request for a transfer from a
peripheral, it signals the CPU that it needs control of the system bus. The CPU then releases con-
trol of the bus and the DMA controller performs the transfer. In many cases, the CPU releases the
bus and continues to execute instructions from the prefetch queue. If the DMA transfers are rel-
atively infrequent, there is no degradation of software performance; the DMA transfer is trans-
parent to the CPU.
The DMA Unit has four channels. Each channel can accept DMA requests from one of four
sources: an external request pin, the Serial Communications Unit, the Timer/Counter Unit or di-
rect programming. Data can be transferred between any combination of memory and I/O space.
The DMA Unit can access the entire memory and I/O space in either byte or word increments.
10.1 FUNCTIONAL OVERVIEW
The DMA Unit is logically divided into two modules with two channels each. The four channels
are functionally identical. The following discussion is hierarchical, beginning with an overview
of a single channel and ending with a description of the full four-channel unit.
10.1.1 The DMA Transfer
A DMA transfer begins with a request. The requesting device may either have data to transmit (a
source request) or it may require data (a destination request). Alternatively, transfers may be ini-
tiated by the system software without an external request.
10-1
Advertisement
Table of Contents
