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Application code requests modification rights by executing the
Breakpoint Resource Request message (src1.Message_Type = 06H). In response, the current
available breakpoint resources will be returned as the src/dst parameter (src/dst must be a register).
The src2 parameter is not used. Results returned in the src/dst parameter must be interpreted as
shown in
Table
9-1.
src/dst 7:4
Number of Available Data Address Breakpoints
src/dst
NOTE:
31:8 are reserved and will always return zeroes.
The following code sample illustrates the execution of the breakpoint resource request.
ldconst 0x600, r4
sysctl r4, r4, r4
Assume in this example that after execution of the
0000 0022H. This indicates that the application has gained modification rights to both instruction
and both data address breakpoint registers. If the value returned is zero, the application has not
gained the rights to the breakpoint resources.
Because the i960 Jx processor does not initialize the breakpoint registers from the control table during
initialization (as i960 Cx processors do), the application must explicitly initialize the breakpoint
registers in order to use them once modification rights have been granted by the
9.2.7.4
Breakpoint Control Register
The format of the BPCON registers are shown in
four control bits associated with it: two mode and two enable bits. The enable bits (DABx.e0,
DABx.e1) in BPCON act to enable or disable the data address breakpoints, while the mode bits
(DABx.m0, DABx.m1) dictate which type of access will generate a break event.
Table 9-1. src/dst Encoding
Number of Available Instruction Breakpoints
# Load the Breakpoint Resource
# Request message type into r4.
# Issue the request.
sysctl
Figure 9-2
TRACING AND DEBUGGING
sysctl
instruction and issuing the
src/dst 3:0
instruction, the value of r4 is
instruction.
sysctl
and
Figure
9-3. Each breakpoint has
9
9-7
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