Usage Of Dma; Peripheral Bus Split Transactions; Memory To Memory Performance Using Dma For Different Memories And Frequencies - Intel PXA270 Optimization Manual

Pxa27x processor family
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3.5.3

Usage of DMA

The DMA controller is used by the PXA27x processor peripherals for data transfers between the
peripheral buffers and the memory (internal and external). Also, depending on the use cases and
user profiles, the operating system may use DMA for copying different pages for its own
operations.
Table 3-7.
Memory to Memory Performance Using DMA for Different Memories and
Frequencies
Clock Ratios
104:104:104
208:104:104
195:195:97.5
338:169:84.5
390:195:97.5
Ratio = Core Frequency : System Bus Frequency : Memory Bus Frequency
Proper DMA controller usage can reduce the workload of the processor by allowing the Intel
XScale® core to use the DMA controller to perform peripheral I/O. The DMA can also be used to
populate the internal memory from the capture interface or external memory, etc.
3.5.4

Peripheral Bus Split Transactions

The DMA bridge between the peripheral bus and the system bus normally performs split
transactions for all operations. This allows for some decoupling of the address and data phases of
transactions and generally improves efficiency. This can be disabled and requires active
transactions complete before another transaction starts. Please refer to the DMA Programmed I/O
Control Status register described in the Intel® PXA27x Processor Family Developer's Manual for
detailed information on this feature and its usage.
Note: When using split transactions (default): If software requires that a write complete on the peripheral
bus before continuing, then software must write the address, then immediately read the same
address. This guarantees that the address has been updated before letting the core continue
execution. The user must perform this read-after-write transaction to ensure the processor is in a
correct state before the core continues execution.
Intel® PXA27x Processor Family Optimization Guide
Table 3-7
shows DMA controller performance data.
DMA Throughput for
Internal to Internal
Memory
127.3
127.6
238.2
206
237.9
System Level Optimization
DMA Throughput for
Internal to External
Memory
52.9
52.3
70.9
59.4
68.6
3-17

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