Samsung S3F80JB User Manual page 13

Table
Number
1-1
1-2
2-1
4-1
4-2
4-3
5-1
5-2
5-3
6-1
6-2
6-3
6-4
6-5
6-6
8-1
8-2
8-3
8-4
8-5
8-6
8-7
9-1
9-3
9-4
S3F80JB MICROCONTROLLER
List of Tables
Pin Descriptions of 32-SOP...................................................................................... 1-7
Pin Descriptions of 44-QFP ...................................................................................... 1-8
S3F80JB Register Type Summary ........................................................................... 2-5
Mapped Registers (Bank0, Set1) ............................................................................. 4-2
Mapped Registers (Bank1, Set1) ............................................................................. 4-3
Each Function Description and Pin Assignment of P3CON in 42/44 Pin Package ... 4-32
S3F80JB Interrupt Vectors ....................................................................................... 5-6
Interrupt Control Register Overview ......................................................................... 5-7
Vectored Interrupt Source Control and Data Registers............................................. 5-9
Instruction Group Summary...................................................................................... 6-2
Flag Notation Conventions ....................................................................................... 6-8
Instruction Set Symbols............................................................................................ 6-8
Instruction Notation Conventions.............................................................................. 6-9
Opcode Quick Reference ......................................................................................... 6-10
Condition Codes....................................................................................................... 6-12
Reset Condition in STOP Mode When IPOR / LVD Control Bit is "1"
(always LVD-On) ...................................................................................................... 8-8
Reset Condition in STOP Mode When IPOR / LVD Control Bit is "0" ....................... 8-8
Set 1, Bank 0 Register Values After Reset ............................................................... 8-15
Set 1, Bank 1 Register Values After Reset ............................................................... 8-17
Reset Generation According to the Condition of Smart Option................................. 8-18
Guideline for Unused Pins to Reduced Power Consumption.................................... 8-19
Summary of Each Mode ........................................................................................... 8-20
S3F80JB Port Configuration Overview (44-QFP) ..................................................... 9-2
S3F80JB Port Configuration Overview (32-SOP) ..................................................... 9-3
Port Data Register Summary.................................................................................... 9-4
Title Page
Number
xv