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S3F80JB
P2PND
— Port 2 External Interrupt Pending Register
Bit Identifier
Reset Value
Read/Write
Addressing Mode
.7
.6
.5
.4
.3
.2
.1
.0
NOTE: To clear an interrupt pending condition, write a "0" to the appropriate pending flag bit. Writing a "1" to an interrupt
rending flag (P2PND.0–7) has no effect.
.7
.6
0
0
R/W
R/W
Register addressing mode only
P2.7 External Interrupt (INT9) Pending Flag Bit (see Note)
0
No P2.7 external interrupt pending (when read)
1
P2.7 external interrupt is pending (when read)
P2.6 External Interrupt (INT9) Pending Flag Bit
0
No P2.6 external interrupt pending (when read)
1
P2.6 external interrupt is pending (when read)
P2.5 External Interrupt (INT9) Pending Flag Bit
0
No P2.5 external interrupt pending (when read)
1
P2.5 external interrupt is pending (when read)
P2.4 External Interrupt (INT9) Pending Flag Bit
0
No P2.4 external interrupt pending (when read)
1
P2.4 external interrupt is pending (when read)
P2.3 External Interrupt (INT8) Pending Flag Bit
0
No P2.3 external interrupt pending (when read)
1
P2.3 external interrupt is pending (when read)
P2.2 External Interrupt (INT7) Pending Flag Bit
0
No P2.2 external interrupt pending (when read)
1
P2.2 external interrupt is pending (when read)
P2.1 External Interrupt (INT6) Pending Flag Bit
0
No P2.1 external interrupt pending (when read)
1
P2.1 external interrupt is pending (when read)
P2.0 External Interrupt (INT5) Pending Flag Bit
0
No P2.0 external interrupt pending (when read)
1
P2.0 external interrupt is pending (when read)
.5
.4
.3
0
0
R/W
R/W
R/W
CONTROL REGISTERS
E6H
Set1 Bank0
.2
.1
0
0
0
R/W
R/W
.0
0
R/W
4-29
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