Set 1, Bank 1 Register Values After Reset - Samsung S3F80JB User Manual

S3F80JB
Register Name
LVD Control Register
Port 3 [4:5] Control Register
Port 4 Control Register (High Byte)
Port 4 Control Register (Low Byte)
Timer 2 Counter Register (High Byte)
Timer 2 Counter Register (Low Byte)
Timer 2 Data Register (High Byte)
Timer 2 Data Register (Low Byte)
Timer 2 Control Register
Comparator Mode Register
Comparison Result Register
Comparator Input Selection Register
Flash Memory Sector
Register (High Byte)
Flash Memory Sector Address
Register (Low byte)
Flash Memory User Programming
Enable Register
Flash Memory Control Register
NOTES:
1. P345CON will be initialized as "50H" to set P3.4 and P3.5 into open drain output mode after reset operation.
2. S3F80JB has P4CONH, P4CONL and P4CON as port4 control registers. P4CONH and P4CONL will be initialized
as the C-MOS input with pull up mode after reset. On the other hand, P4CON will be initialized as open-drain output
mode. After reset, status of port4 is decided by P345CON.0 bit. So port4 reset status will be initialized as open-drain
output mode.
Table 8-4. Set 1, Bank 1 Register Values After Reset
Mnemonic
LVDCON
P345CON
P4CONH
P4CONL
T2CNTH
T2CNTL
T2DATAH
T2DATAL
T2CON
CMOD
CMPREG
CMPSEL
Address FMSECH
FMSECL
FMUSR
FMCON
Address
Dec Hex 7 6
224 E0H – –
225 E1H 0 1
226 E2H 1 1
227 E3H 1 1
228 E4H 0 0
229 E5H 0 0
230 E6H 1 1
231 E7H 1 1
232 E8H 0 0
233 E9H 0 0
234 EAH 0 0
235 EBH – –
236 ECH 0 0
237 EDH 0 0
238 EEH 0 0
239 EFH 0 0
Bit Values After Reset
5 4 3 2
– – – –
0 1 0 0
1 1 1 1
1 1 1 1
0 0 0 0
0 0 0 0
1 1 1 1
1 1 1 1
0 0 0 0
0 0 0 0
0 0 0 0
– – 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 – –
RESET
1 0
– 0
0 0
1 1
1 1
0 0
0 0
1 1
1 1
0 0
0 0
0 0
0 0
0 0
0 0
0 0
– 0
8-17