P4Conl Port 4 Control Register (Low Byte) - Samsung S3F80JB User Manual

CONTROL REGISTERS
P4CONL
— Port 4 Control Register (Low Byte)
Bit Identifier
Reset Value
Read/Write
Addressing Mode
.7 and .6
.5 and .4
.3 and .2
.1 and .0
NOTE: After CPU reset, P4.3 – P4.0 will be C-MOS input with pull up mode by the reset value of P4CONL register.
4-36
.7 .6
1 1
R/W R/W
Register addressing mode only
P4.3 Mode Selection Bits
0 0 C-MOS input mode
0 1 Open-drain output mode
1 0 Push-pull output mode
1 1 C-MOS input with pull up mode
P4.2 Mode Selection Bits
0 0 C-MOS input mode
0 1 Open-drain output mode
1 0 Push-pull output mode
1 1 C-MOS input with pull up mode
P4.1 Mode Selection Bits
0 0 C-MOS input mode
0 1 Open-drain output mode
1 0 Push-pull output mode
1 1 C-MOS input with pull up mode
P4.0 Mode Selection Bits
0 0 C-MOS input mode
0 1 Open-drain output mode
1 0 Push-pull output mode
1 1 C-MOS input with pull up mode
.5 .4 .3
1 1
R/W R/W R/W
E3H Set1 Bank1
.2 .1
1 1 1
R/W R/W
S3F80JB
.0
1
R/W