Samsung S3F80JB User Manual page 299

8-bit cmos microcontrollers
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LOW VOLTAGE DETECTOR
1. When smart option bit is set "1", operating frequency is selected 8MHz and LVD voltage level is 2.3V.
On the other hand, when smart option bit is set "0", operating frequency is selected 4MHz and LVD
voltage level is 2.15V.
2. When smart option bit is set "1", operating frequency is selected 8MHz and LVD_FLAG voltage level
is 2.15V. On the other hand, when smart option bit is set "0", operating frequency is selected 4MHz
and LVD_FLAG voltage level is 1.9V.
3. A term of LVD is a symbol of parameter that means 'Low Level Detect Voltage for Back-Up Mode'.
4. A term of LVD_FLAG is a symbol of parameter that means 'Low Level Detect Voltage for Flag
Indicator'.
5. In case of 8MHz operating frequency, the voltage gap between LVD and LVD_FLAG is 150mV. In
case of 4MHz operating frequency, the voltage gap between LVD and LVD_ FLAG is 250mV.
IPOR/LVD Control Bit
(smart option[7]@03FH)
16-2
Resistor String
STOP
Figure 16-1. Low Voltage Detect (LVD) Block Diagram
NOTES
Comparator
V
DIV
V
DIV_Flag
Comparator
V
IN
V
REF
Bias
BANDGAP
LVD
(BackupMode
/Reset)
Bias
LVDCON.0
(LVD Flag Bit)
S3F80JB

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