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CONTROL REGISTERS
P2CONH
—
Port 2 Control Register (High Byte)
Bit Identifier
Reset Value
Read/Write
Addressing Mode
.7 and .6
.5 and .4
.3 and .2
.1 and .0
NOTES:
1.
Pull-up resistors can be assigned to individual port2 pins by making the appropriate settings to the P2PUR control
register, location EEH, set 1, bank0.
2.
Analog comparator inputs (CIN0-CIN3) for P2.4-P2.7 can be assigned to individual port 2 pins by making the
appropriate settings to the CMPSEL register, location EBH, set 1, bank1. If an analog comparator input is selected by
the CMPSEL register, normal I/O inputs for P2.4-P2.7 are disconnected regardless of P2CONH register's setting value.
4-26
.7
.6
0
0
R/W
R/W
Register addressing mode only
P2.7/INT9 Mode Selection Bits
0
0
C-MOS input mode; interrupt on falling edges
0
1
C-MOS input mode; interrupt on rising and falling edges
1
0
Push-pull output mode
1
1
C-MOS input mode; interrupt on rising edges
P2.6/INT9 Mode Selection Bits
0
0
C-MOS input mode; interrupt on falling edges
0
1
C-MOS input mode; interrupt on rising and falling edges
1
0
Push-pull output mode
1
1
C-MOS input mode; interrupt on rising edges
P2.5/INT9 Mode Selection Bits
0
0
C-MOS input mode; interrupt on falling edges
0
1
C-MOS input mode; interrupt on rising and falling edges
1
0
Push-pull output mode
1
1
C-MOS input mode; interrupt on rising edges
P2.4/INT9 Mode Selection Bits
0
0
C-MOS input mode; interrupt on falling edges
0
1
C-MOS input mode; interrupt on rising and falling edges
1
0
Push-pull output mode
1
1
C-MOS input mode; interrupt on rising edges
.5
.4
.3
0
0
R/W
R/W
R/W
ECH Set1 Bank0
.2
.1
0
0
0
R/W
R/W
S3F80JB
.0
0
R/W
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