Comparator Mode Register (Cmod); Comparator Input Selection Register (Cmpsel) - Samsung S3F80JB User Manual

COMPARATOR
MSB .7
Conversion Timer Control Bit
0: 8x2
1: 8x2
Comparator Enale/Disable Bit
0:Comparator operation disable
1:Comparator operation enable
MSB
Not used for S3F80JB.
14-4

Comparator Mode Register (CMOD)

E9H, Set1, Bank 1, R/W
.6 .5 .4 .3
Not used for S3F80JB.
External /Internal Reference Selection Bit
0: Internal reference, CIN0-3:analog input
1: External reference,CIN0-2: analog input, CIN3:reference input
7
/fosc,256us at 8MHz
4
/fosc,32us at 8MHz
Figure 14-3. Comparator Mode Register (CMOD)

Comparator Input Selection Register (CMPSEL)

EBH, Set1, Bank 1, R/W
.7 .6 .5 .4
P2.7 Function Selection Bit
0:Normal I/O selection
1:Alternative function enable: CIN3
Figure 14-4. Comparator Input Selection Register (CMPSEL)
.2 .1 .0 LSB
Reference Voltage Selection Bits
Selected Vref=Vdd x (N + 0.5)/16, n=0 to 15
.3 .2 .1 .0
P2.4 Function Selection Bit
0:Normal I/O selection
1:Alternative function enable: CIN0
P2.5 Function Selection Bit
0:Normal I/O selection
1:Alternative function enable: CIN1
P2.6 Function Selection Bit
0:Normal I/O selection
1:Alternative function enable: CIN2
LSB
S3F80JB