Ldc/Lde Load Memory - Samsung S3F80JB User Manual

8-bit cmos microcontrollers
Table of Contents

Advertisement

INSTRUCTION SET
LDC/LDE
— Load Memory
LDC/LDE
dst,src
dst ← src
Operation:
This instruction loads a byte from program or data memory into a working register or vice-versa.
The source values are unaffected. LDC refers to program memory and LDE to data memory. The
assembler makes 'Irr' or 'rr' values an even number for program memory and odd an odd number
for data memory.
Flags:
No flags are affected.
Format:
1.
opc
2.
opc
3.
opc
4.
opc
5.
opc
6.
opc
7.
opc
8.
opc
9.
opc
10.
opc
NOTES:
1.
The source (src) or working register pair [rr] for formats 5 and 6 cannot use register pair 0–1.
2.
For formats 3 and 4, the destination address 'XS [rr]' and the source address 'XS [rr]' are each one
byte.
3.
For formats 5 and 6, the destination address 'XL [rr] and the source address 'XL [rr]' are each two
bytes.
4.
The DA and r source values for formats 7 and 8 are used to address program memory; the second set
of values, used in formats 9 and 10, are used to address data memory.
6-52
dst | src
src | dst
XS
dst | src
XS
src | dst
XL
dst | src
L
XL
src | dst
L
DA
dst | 0000
L
DA
src | 0000
L
DA
dst | 0001
L
DA
src | 0001
L
Bytes
Cycles
2
2
3
3
XL
4
H
XL
4
H
DA
4
H
DA
4
H
DA
4
H
DA
4
H
Opcode
Addr Mode
(Hex)
dst
10
C3
10
D3
Irr
12
E7
12
F7
XS [rr]
14
A7
14
B7
XL [rr]
14
A7
14
B7
DA
14
A7
14
B7
DA
S3F80JB
src
r
Irr
r
r
XS [rr]
r
r
XL [rr]
r
r
DA
r
r
DA
r

Advertisement

Table of Contents
loading

Table of Contents