P2Conl Port 2 Control Register (Low Byte) - Samsung S3F80JB User Manual

S3F80JB
P2CONL
—
Port 2 Control Register (Low Byte)
Bit Identifier
Reset Value
Read/Write
Addressing Mode
.7 and .6
.5 and .4
.3 and .2
.1 and .0
NOTE: Pull-up resistors can be assigned to individual port 2 pins by making the appropriate settings to the P2PUR control
register, location EEH, set 1,bank0.
.7 .6
0 0
R/W R/W
Register addressing mode only
P2.3/INT8 Mode Selection Bits
0 0 C-MOS input mode; interrupt on falling edges
0 1 C-MOS input mode; interrupt on rising edges and falling edges
1 0 Push-pull output mode
1 1 C-MOS input mode; interrupt on rising edges
P2.2/INT7 Mode Selection Bits
0 0 C-MOS input mode; interrupt on falling edges
0 1 C-MOS input mode; interrupt on rising edges and falling edges
1 0 Push-pull output mode
1 1 C-MOS input mode; interrupt on rising edges
P2.1/INT6 Mode Selection Bits
0 0 C-MOS input mode; interrupt on falling edges
0 1 C-MOS input mode; interrupt on rising edges and falling edges
1 0 Push-pull output mode
1 1 C-MOS input mode; interrupt on rising edges
P2.0/INT5 Mode Selection Bits
0 0 C-MOS input mode; interrupt on falling edges
0 1 C-MOS input mode; interrupt on rising edges and falling edges
1 0 Push-pull output mode
1 1 C-MOS input mode; interrupt on rising edges
.5 .4 .3
0 0
R/W R/W R/W
CONTROL REGISTERS
EDH Set1 Bank0
.2 .1
0 0 0
R/W R/W
.0
0
R/W
4-27