Samsung S3F80JB User Manual page 84

8-bit cmos microcontrollers
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S3F80JB
IRQ
— Interrupt Request Register
Bit Identifier
Reset Value
Read/Write
Addressing Mode
.7
.6
.5
.4
.3
.2
.1
.0
.7
.6
0
0
R
R
Register addressing mode only
Level 7 (IRQ7) Request Pending Bit; External Interrupts P0.7–P0.4
0
Not pending
1
Pending
Level 6 (IRQ6) Request Pending Bit; External Interrupts P0.3–P0.0
0
Not pending
1
Pending
Level 5 (IRQ5) Request Pending Bit; External Interrupts P2.7–P2.4
0
Not pending
1
Pending
Level 4 (IRQ4) Request Pending Bit; External Interrupts P2.3–P2.0
0
Not pending
1
Pending
Level 3 (IRQ3) Request Pending Bit; Timer 2 Match/Capture or Overflow
0
Not pending
1
Pending
Level 2 (IRQ2) Request Pending Bit; Counter A Interrupt
0
Not pending
1
Pending
Level 1 (IRQ1) Request Pending Bit; Timer 1 Match/Capture or Overflow
0
Not pending
1
Pending
Level 0 (IRQ0) Request Pending Bit; Timer 0 Match/Capture or Overflow
0
Not pending
1
Pending
.5
.4
.3
0
0
0
R
R
R
CONTROL REGISTERS
DCH Set1 Bank0
.2
.1
.0
0
0
0
R
R
R
4-17

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