Linear Flash Bpi - Xilinx SP601 User Manual

Chapter 1: SP601 Evaluation Board
Figure 1-8
X-Ref Target - Figure 1-8
References
See the Winbond Serial Flash specifications for more information at
usa.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/SerialFlash/W25X64.htm
See the XPS Serial Peripheral Interface specification for more information at
http://www.xilinx.com/support/documentation/ip_documentation/xps_spi.pdf.

4. Linear Flash BPI

An 8-bit (16 MB) Numonyx linear flash memory (TE 28F128J3D-75) (J3D type) is used to
provide non-volatile bitstream, code, and data storage. The J3D devices operate at 3.0V; the
Spartan-6 FPGA I/Os are 3.3V tolerant and provide electrically compatible logic levels to
directly access the linear flash BPI through a 2.5V bank. For details on configuring the
FPGA, see
X-Ref Target - Figure 1-9
Table 1-7: BPI Memory Connections
20
provides the UCF constraints for the SPI serial flash PROM.
NET "FPGA_D2_MISO3"
NET "SPI_CS_B"
NET "FPGA_D0_DIN_MISO_MISO1"
NET "FPGA_D1_MISO2"
NET "FPGA_MOSI_CSI_B_MISO0"
NET "FPGA_CCLK"
Figure 1-8: UCF Location Constraints for BPI Flash Connections
"Configuration Options."
U1
FPGA
BPI FLASH
INTERFACE
Figure 1-9: Linear Flash BPI Interface
FPGA U1 Pin
K18 FLASH_A0
K17 FLASH_A1
J18 FLASH_A2
J16 FLASH_A3
G18 FLASH_A4
G16 FLASH_A5
www.xilinx.com
LOC = "V14";
LOC = "V3";
LOC = "R13";
LOC = "T14";
LOC = "T13";
LOC = "R15";
ADDR, DATA, CTRL
Schematic Netname
http://www.winbond-
U10
NUMONYX TYPE J3vD
T28F128J3D-75
UG518_09_070809
BPI Memory U10
Pin Number Pin
32 A0
28 A1
27 A2
26 A3
25 A4
24 A5
SP601 Hardware User Guide
UG518 (v1.1) August 19, 2009
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