Specification Clarifications - Intel CORE I7-900 DEKSTOP - SPECIFICATION Specification

Specification Clarifications

Specification Clarifications
The Specification Clarifications listed in this section may apply to the following
documents:
• Intel
Datasheet
• Intel
Architecture
• Intel
Instruction Set Reference Manual A-M
• Intel
Instruction Set Reference Manual N-Z
• Intel
System Programming Guide
• Intel
System Programming Guide
AAJ1 Clarification of TRANSLATION LOOKASIDE BUFFERS (TLBS)
Invalidation
Section 10.9 INVALIDATING THE TRANSLATION LOOKASIDE BUFFERS (TLBS) of the
®
Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A: System
Programming Guide will be modified to include the presence of page table structure
caches, such as the page directory cache, which Intel processors implement. This
information is needed to aid operating systems in managing page table structure
invalidations properly.
Intel will update the Intel
Volume 3A: System Programming Guide in the coming months. Until that time, an
application note, TLBs, Paging-Structure Caches, and Their Invalidation
(http://www.intel.com/products/processor/manuals/index.htm), is available which
provides more information on the paging structure caches and TLB invalidation.
In rare instances, improper TLB invalidation may result in unpredictable system
behavior, such as system hangs or incorrect data. Developers of operating systems
should take this documentation into account when designing TLB invalidation
algorithms. For the processors affected, Intel has provided a recommended update to
system and BIOS vendors to incorporate into their BIOS to resolve this issue. The
®
Intel Core™ i7 processor is not affected by this issue.
®
Intel Core™ i7 processor
Specification Update
®
Core™ i7 Processor Extreme Edition and Intel
®
64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic
®
64 and IA-32 Architectures Software Developer's Manual, Volume 2A:
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64 and IA-32 Architectures Software Developer's Manual, Volume 2B:
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64 and IA-32 Architectures Software Developer's Manual, Volume 3A:
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64 and IA-32 Architectures Software Developer's Manual, Volume 3B:
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64 and IA-32 Architectures Software Developer's Manual,
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Core™ i7 Processor
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