Intel CORE I7-900 DEKSTOP - SPECIFICATION Specification page 34

An interrupt directed at a Core in C3 or C6 that collides with an Intel®
Problem:
QuickPath Interconnect Lock sequence may delay ISOCH transactions to
DRAM long enough to underrun USB 1.1 buffers.
Implication: USB 1.1 Audio devices may have audio glitches.
Workaround: None identified.
For the steppings affected, see the Summary Table of Changes.
Status:
AAJ44. Stack Pointer May Become Incorrect In Loops With Unbalanced Push
and Pop Operations
If a loop has an unbalanced number of Push and Pop operations, under a
Problem:
specific set of conditions, it is possible that the stack pointer (SP/ESP/RSP)
may become incorrect.
Implication: When this erratum occurs, unpredictable behavior may result.
Intel has not observed this erratum with any commercially available software.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
For the steppings affected, see the Summary Table of Changes.
Status:
AAJ45. A P-state Change While Another Core is in C6 May Prevent Further C-
state and P-state Transitions
Under a specific set of conditions, when one core is in C6 and another core
Problem:
transitions from Pn to a non-Pn ratio, further C-state and P-state changes
may be blocked.
Implication: The processor may stop responding to additional requests for
deeper sleep state or ratio changes.
Workaround: It is possible for the BIOS to contain a workaround for this erratum
For the steppings affected, see the Summary Table of Changes.
Status:
AAJ46. Certain Store Parity Errors May Not Log Correct Address in
IA32_MCi_ADDR
When store parity errors in the Level 0 hierarchy (as defined in the LL subfield
Problem:
of the IA32_MCi_STATUS MSR) occur, it is possible that the address of the
error will not be logged in IA32_MCi_ADDR MSR. The error itself will be
logged properly.
Implication: The address in IA32_MCi_ADDR may be incorrect after certain
store parity errors occur.
Workaround: None identified.
For the steppings affected, see the Summary Table of Changes.
Status:
Errata
®
Intel Core™ i7 processor
Specification Update