Intel CORE I7-900 DEKSTOP - SPECIFICATION Specification page 40

Implication: Due to this erratum a system hang may occur.
Workaround: It is possible for the BIOS to contain a workaround for this erratum
For the steppings affected, see the Summary Table of Changes.
Status:
AAJ64. Memory Controller Address Parity Error Injection Does Not Work
Correctly
When MC_CHANNEL_{0,1,2}_ECC_ERROR_INJECT.INJECT_ADDR_PARITY bit
Problem:
[4] = 1 an error may be injected on any command on the channel and not
just RD or WR CAS commands that match
MC_CHANNEL_{0,1,2}_ADDR_MATCH.
Implication: Address parity error injection cannot be used to reliably target a
DIMM or memory location within a channel. When the address parity errors
occur, the IA32_MCi_MISC register reflects the DIMM ID of the DIMM that
detected error and not necessarily the DIMM that was targeted by the error
injection settings.
Workaround: None identified.
For the steppings affected, see the Summary Table of Changes.
Status:
AAJ65. Memory Controller Opportunistic Refreshes Might be Missed
If a system meets all 3 conditions below, opportunistic refresh capability
Problem:
might be degraded.
1. 2x refresh enabled and opportunistic refreshes enabled through
tTHROT_OPPREFRESH field in the MC_CHANNEL_{0,1,2}_REFRESH_TIMING
2. DDR3-800 DIMMS or DDR3-1066 DIMMS with tREFI value programmed more than
5% lower than the nominal value
3. More than 2 DIMMs populated
Implication: Due to this erratum, a corner condition can cause a persistent
degradation of opportunistic refresh capability.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
For the steppings affected, see the Summary Table of Changes.
Status:
AAJ66. Delivery of Certain Events Immediately Following a VM Exit May Push
a Corrupted RIP Onto The Stack
If any of the following events is delivered immediately following a VM exit to
Problem:
64-bit mode from outside 64-bit mode, bits 63:32 of the RIP value pushed on
the stack may be cleared to 0:
4. A non-maskable interrupt (NMI);
5. A machine-check exception (#MC);
6. A page fault (#PF) during instruction fetch; or
Errata
®
Intel Core™ i7 processor
Specification Update