Intel CORE I7-900 DEKSTOP - SPECIFICATION Specification page 14

No C-0 D-0
AAJ95
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AAJ96
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Status
Performance Monitor Event Offcore_response_0 (B7H) Does Not Count NT
No Fix
Stores to Local DRAM Correctly
EFLAGS Discrepancy on Page Faults and on EPT-Induced VM Exits after a
No Fix
Translation Change
System May Hang if
MC_CHANNEL_{0,1,2}_MC_DIMM_INIT_CMD.DO_ZQCL Commands Are
No Fix
Not Issued in Increasing Populated DDR3 Rank Order
LER and LBR MSRs May Be Incorrectly Updated During a Task Switch
No Fix
Virtualized WRMSR to the IA32_EXT_XAPIC_TPR MSR Uses Incorrect Value
Fixed
for TPR Threshold
Back to Back Uncorrected Machine Check Errors May Overwrite
No Fix
IA32_MC3_STATUS.MSCOD
Memory Intensive Workloads with Core C6 Transitions May Cause System
No Fix
Hang
Corrected Errors With a Yellow Error Indication May be Overwritten by
No Fix
Other Corrected Errors
PSI# Signal May Incorrectly be Left Asserted
No Fix
A String Instruction that Re-maps a Page May Encounter an Unexpected
No Fix
Page Fault
Performance Monitor Events DCACHE_CACHE_LD and DCACHE_CACHE_ST
No Fix
May Overcount
Rapid Core C3/C6 Transition May Cause Unpredictable System Behavior
No Fix
Performance Monitor Events INSTR_RETIRED and MEM_INST_RETIRED
No Fix
May Count Inaccurately
A Page Fault May Not be Generated When the PS bit is set to "1" in a
No Fix
PML4E or PDPTE
tRP Timing Violations May be Observed Near a Self Refresh Entry
Plan Fix
System May Hang if
MC_CHANNEL_{0,1,2}_MC_DIMM_INIT_CMD.DO_ZQCL Commands Are
No Fix
Not Issued in Increasing Populated DDR3 Rank Order
Concurrent Updates to a Segment Descriptor May be Lost
No Fix
Processor May Incorrectly Demote Processor C6 State to a C3 State
Memory Controller Clock Circuits May Show a Temperature Sensitive
No Fix
Dependence on Power-On Conditions
PMIs May be Lost During Core C6 Transitions
No Fix
Uncacheable Access to a Monitored Address Range May Prevent Future
No Fix
Triggering of the Monitor Hardware
BIST Results May be Additionally Reported After a GETSEC[WAKEUP] or
No Fix
INIT-SIPI Sequence
Pending x87 FPU Exceptions (#MF) May be Signaled Earlier Than Expected
No Fix
Summary Tables of Changes
ERRATA
®
Intel Core™ i7 processor
Specification Update