Intel CORE I7-900 DEKSTOP - SPECIFICATION Specification page 54

Implication: Software may see an unexpected page fault that indicates that
there is no translation for the page. Intel has not observed this erratum with
any commercially available software or system.
Workaround: Software should not update the paging structures with a string instruction
that accesses pages mapped the modified paging structures.
For the steppings affected, see the Summary Table of Changes.
Status:
AAJ105. Performance Monitor Events DCACHE_CACHE_LD and
DCACHE_CACHE_ST May Overcount
The performance monitor events DCACHE_CACHE_LD (Event 40H) and
Problem:
DCACHE_CACHE_ST (Event 41h) count cacheable loads and stores that hit
the L1 cache. Due to this erratum, in addition to counting the completed
loads and stores, the counter will incorrectly count speculative loads and
stores that were aborted prior to completion.
Implication: The performance monitor events DCACHE_CACHE_LD and
DCACHE_CACHE_ST may reflect a count higher than the actual number of
events.
Workaround: None identified.
For the steppings affected, see the Summary Tables of Changes.
Status:
AAJ106. Rapid Core C3/C6 Transition May Cause Unpredictable System
Behavior
Under a complex set of internal conditions, cores rapidly performing C3/C6
Problem:
transitions in a system with Intel® Hyper-Threading Technology enabled may
cause a machine check error (IA32_MCi_STATUS.MCACOD = 0x0106), system
hang or unpredictable system behavior.
Implication: This erratum may cause a machine check error, system hang or
unpredictable system behavior.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
For the steppings affected, see the Summary Tables of Changes.
Status:
AAJ107. Performance Monitor Events INSTR_RETIRED and
MEM_INST_RETIRED May Count Inaccurately
The performance monitor event INSTR_RETIRED (Event C0H) should count
Problem:
the number of instructions retired, and MEM_INST_ RETIRED (Event 0BH)
should count the number of load or store instructions retired. However, due to
this erratum, they may undercount.
Errata
®
Intel Core™ i7 processor
Specification Update