3.4 Control Register .............................................................................................................. 3-4
MISC PSR Register ................................................................................................................... 3-4
Debug RAM Base Register ....................................................................................................... 3-4
4 Memory and Bus ..........................................................................................................4-1
4.1 Overview ......................................................................................................................... 4-1
4.2 Bus Access Cycle ........................................................................................................... 4-1
4.3 Flash Memory ................................................................................................................. 4-2
4.3.1 Flash Memory Pin ............................................................................................. 4-2
4.3.3 Flash Programming ........................................................................................... 4-3
4.4 RAM ................................................................................................................................ 4-3
4.5 Display Data RAM ........................................................................................................... 4-4
4.6 Peripheral Circuit Control Registers ................................................................................ 4-4
4.7 Control Registers ............................................................................................................ 4-7
MISC IRAM Size Register.......................................................................................................... 4-7
5.1 Overview ......................................................................................................................... 5-1
5.2 Vector Table .................................................................................................................... 5-1
5.3 Initialization ..................................................................................................................... 5-3
5.5 NMI .................................................................................................................................. 5-4
5.6 Software Interrupts ......................................................................................................... 5-4
5.8 Control Registers ............................................................................................................ 5-5
6 I/O Ports (PPORT) .........................................................................................................6-1
6.1 Overview ......................................................................................................................... 6-1
6.2.1 Schmitt Input .................................................................................................... 6-2
6.2.3 Pull-Up/Pull-Down ............................................................................................ 6-2
6.3 Clock Settings ................................................................................................................. 6-3
6.4 Operations ...................................................................................................................... 6-3
6.4.1 Initialization ....................................................................................................... 6-3
6.5 Interrupts ......................................................................................................................... 6-6
S1C17M01 TECHNICAL MANUAL
(Rev. 1.2)
Seiko Epson Corporation
CONTENTS
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