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Configuration
4.5.14
LED Configuration Register (LCFG)
The LED Configuration Register holds a series of bits defining the onboard configuration of the
Debug LEDs (DLED 0..3). For the location of the Debug LEDs, refer to Figures 1-5 and 1-6.
Table 4-21: LED Configuration Register (LCFG)
REGISTER NAME
ADDRESS
BIT
NAME
7-4
Res.
Reserved
3-0
LCON
LED Configuration:
0000 = POST
0001 = Mode A
0010 - 1111 = Reserved
1)
In uEFI BIOS POST mode, the Debug LEDs build a binary vector to display uEFI BIOS POST
code during the pre-boot phase. In doing so, the higher 4-bit nibble of the 8-bit uEFI BIOS
POST code is displayed followed by the lower nibble followed by a pause. The uEFI BIOS
POST code is displayed in general in green color.
DLED3:
POST bit 3 and bit 7 (green)
DLED2:
POST bit 2 and bit 6 (green)
DLED1:
POST bit 1 and bit 5 (green)
DLED0:
POST bit 0 and bit 4 (green)
2)
Configured for Mode A, the Debug LEDs are dedicated to functions as follows:
DLED3:
LED 3 (red/green/red+green)
DLED2:
LED 2 (red/green/red+green)
DLED1:
LED 1 (red/green/red+green)
DLED0:
LED 0 (red/green/red+green)
Besides the configurable functions described above, the Debug LEDs fulfill also a basic debug
function during the power-up phase as long as the first access to Port 80 is processed. If an
LED lights red and stays red, than a basic error is present on the board. The following debug
functions are defined and displayed during this initialization phase.
DLED3:
PGOOD, Power Good status not reached (red)
DLED2:
CPU catastrophic error (red)
DLED1:
RST, PCI reset active / not deactivated (red)
DLED0:
uEFI BIOS boot failure (red)
Page 4 - 20
LED CONFIGURATION REGISTER (LCFG)
DESCRIPTION
1)
2)
CP6003-RA/RC
0x290
ID 1046-3890, Rev. 1.0
RESET
ACCESS
VALUE
0000
R
0001
R/W
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