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CP321
4.3.3
Memory Configuration Register
The Memory Configuration register provides basic information concerning the amount of in-
stalled main memory, whether or not ECC is enabled, and from where the operating system is
to obtain the boot strap loader.
Table 4-6: Memory Configuration Register
REGISTER NAME
ADDRESS
BIT POSITION
CONTENT
DEFAULT
BIT
NAME
0
SZ0
1
SZ1
2
3
4
ECC
5
6
7
BJ
ID 24977, Rev. 02
MEMORY CONFIGURATION
0xFFE0 0014
7
6
5
BJ
res.
res.
n/a
n/a
n/a
VAL
0
Settings: SZ1 SZ0
0
1
0
0
1
1
1
0
reserved
1
0
reserved
1
0
ECC disabled
1
ECC enabled
0
reserved
1
0
reserved
1
0
Boot Jumper J1 closed (CP321 fetches boot code from socket 1)
1
Boot Jumper J1 open (CP321 fetches boot code from onboard flash)
© 2003 Kontron Modular Computers GmbH
4
3
ECC
res.
n/a
n/a
DESCRIPTION
0
32 MB (64 Mbit chips, 1 bank equipped)
1
64 MB (64 Mbit chips, 2 banks equipped)
0
256 MB (256 Mbit chips, 2 banks equipped)
1
128 MB (128 Mbit chips, 2 banks equipped)
Configuration
ACCESS
R
2
1
0
res.
SZ1
SZ0
n/a
n/a
n/a
Page 4 - 9
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