ARM DS-5 Manual page 19

Related information
CoreSight Technology System Design Guide.
1.3.2 Boundary scan test vectors
If you use the JTAG boundary scan test methodology to apply production test vectors, you might want to
have independent external access to each Test Access Port (TAP) controller. This avoids the requirement
to merge test vectors for more than one block in the device.
One solution to this is to adopt a hybrid, using a pin on the package that switches elements of the device
into a test mode. You can use this to break the internal daisy chaining of TDO and TDI signals, and to
multiplex out independent JTAG ports on pins that are used for another purpose during normal operation.
Related concepts
1.3.1 ICs containing multiple devices on page 1-18.
Related information
CoreSight Technology System Design Guide.
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1 ARM DSTREAM System Design Guidelines
1.3 ASIC guidelines
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