Table 2-5 Mictor 38 Signals - ARM DS-5 Manual

2.3.3 Mictor 38 interface signals
The table describes the signals on the Mictor 38 interface.
Signal I/O
TRACEPKT, Input
TRACEDATA,
PIPESTAT,
TRACESYNC,
TRACECTL
TRACECLK Input
TDI Output
TDO Input
TMS Output
TCK Output
RTCK Input
ARM 100956_0527_00_en
Pin ETMv3/TPIU ETMv2
25 TRACEDATA[14] TRACEPKT[14] TRACEPKT[14] A
26 TRACEDATA[2] TRACEPKT[2]
27 TRACEDATA[13] TRACEPKT[13] TRACEPKT[13] A
28 TRACEDATA[1] TRACEPKT[1]
29 TRACEDATA[12] TRACEPKT[12] TRACEPKT[12] A
30 Logic 0 TRACEPKT[0]
31 TRACEDATA[11] TRACEPKT[11] TRACEPKT[11] A
32 Logic 0 PIPESTAT[3]
33 TRACEDATA[10] TRACEPKT[10]
34 Logic 1 PIPESTAT[2]
35 TRACEDATA[9] TRACEPKT[9]
36 TRACECTL PIPESTAT[1]
37 TRACEDATA[8] TRACEPKT[8]
38 TRACEDATA[0] PIPESTAT[0]
Description
These pins provide DSTREAM with ETM/TPIU trace data in the various formats shown above.
You are advised to series terminate these signals close to the target processor.
The Trace Clock pin provides DSTREAM with the clock signal necessary to sample all of the
trace data signals above. You are advised to series terminate TRACECLK close to the target
processor.
The Test Data In pin provides serial data to the target during debugging. TDI can be pulled HIGH
on the target.
The Test Data Out pin receives serial data from the target during debugging. You are advised to
series terminate TDO close to the target processor. TDO is typically pulled HIGH on the target.
The Test Mode Select pin sets the state of the Test Access Port (TAP) controller on the target.
TMS can be pulled HIGH on the target to keep the TAP controller inactive when not in use.
The Test Clock pin clocks data into the TDI and TMS inputs of the target. TCK is typically pulled
HIGH on the target.
The Return Test Clock pin echos the test clock signal back to DSTREAM for use with adaptive
mode clocking. If RTCK is generated by the target processor, you are advised to series terminate
it. RTCK can be pulled HIGH or LOW on the target when not in use.
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2 ARM DSTREAM Target Interface Connections
2.3 The Mictor 38 connector pinouts and interface signals
Table 2-4 Mictor 38 interface pinout table (continued)
ETMv1 I/O diagram Voltage domain
TRACEPKT[2] A
TRACEPKT[1] A
TRACEPKT[0] A
TRACESYNC A
A
PIPESTAT[2] A
TRACEPKT[9] A
PIPESTAT[1] A
TRACEPKT[8] A
PIPESTAT[0] A
B
B
B
B
B
B
B
B
B
B
B
B
B
B

Table 2-5 Mictor 38 signals

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