Core peripherals
4.4.19
SCB register map
The table provides shows the System control block register map and reset values. The base
address of the SCB register block is 0xE000 ED00 for register described in
Offset
Register
CPUID
0x00
Reset Value
ICSR
0x04
Reset Value
VTOR
0x08
Reset Value
AIRCR
0x0C
Reset Value
SCR
0x10
Reset Value
CCR
0x14
Reset Value
SHPR1
0x18
Reset Value
244/262
Table 53. SCB register map and reset values
Implementer
0 1 0 0 0 0 0 1 0 0 0 1 1 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 0 0 0 1
0
0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VECTKEY[15:0]
1 1 1 1 1 0 1 0 0 0 0 0 0 1 0 1 0
Reserved
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Variant
Constant
VECTPENDING[9:0]
0 0 0 0 0 0 0 0 0 0 0 0
TABLEOFF[29:9]
Reserved
Reserved
PRI6
PM0214 Rev 10
PartNo
VECTACTIVE[8:0]
0 0 0 0 0 0 0 0 0
Reserved
Reserved
0 0 0
1 0
PRI5
PM0214
Table
53.
Revision
Reserved
0 0 0
0
0 0
0 0
0 0
PRI4
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