Qasx And Qsax - ST STM32F3 Series Programming Manual

PM0214
QSUB8
3.7.4

QASX and QSAX

Saturating Add and Subtract with Exchange and Saturating Subtract and Add with
Exchange, signed.
Syntax
op{cond} {Rd}, Rm, Rn
Where:
•
op' is one of:
QASX Add and Subtract with Exchange and Saturate.
QSAX Subtract and Add with Exchange and Saturate.
•
'cond' is an optional condition code (see
•
'Rd' is the destination register.
•
'Rn, Rm' are registers holding the first and second operands.
Operation
The QASX instruction:
1. Adds the top halfword of the source operand with bottom halfword of second operand.
2. Subtracts the top halfword of second operand from bottom highword of first operand.
3. Saturates the result of the subtraction and writes a 16-bit signed integer in the range –
15
2
4. Saturates the results of the sum and writes a 16-bit signed integer in the range
15
5. –2
The QSAX instruction:
1. Subtracts the bottom halfword of second operand from top highword of first operand.
2. Adds the bottom halfword of source operand with top halfword of second operand.
3. Saturates the results of the sum and writes a 16-bit signed integer in the range
15
4. –2
5. Saturates the result of the subtraction and writes a 16-bit signed integer in the range –
15
2
Restrictions
Do not use SP and do not use PC.
Condition flags
These instructions do not affect the condition code flags.
Examples
QASX
; of R2, saturates to 16 bits, writes to corresponding
; halfword of R4
R4, R2, R5 ; Subtracts bytes of R5 from the corresponding byte in R2
; saturates to 8 bits, writes to corresponding byte ofR4.
15
≤ x ≤ 2
– 1, where x equals 16, to the bottom halfword of the destination register.
15
≤ x ≤ 2
– 1, where x equals 16, to the top halfword of the destination register.
15
≤ x ≤ 2
– 1, where x equals 16, to the bottom halfword of the destination register.
15
≤ x ≤ 2 – 1, where x equals 16, to the top halfword of the destination register.
R7, R4, R2 ; Adds top halfword of R4 to bottom halfword of R2,
; saturates to 16 bits, writes to top halfword of R7
The STM32 Cortex-M4 instruction set
Conditional execution on page
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