Mpu Register Map; Table 44. Mpu Register Map And Reset Values - ST STM32F3 Series Programming Manual

Core peripherals
4.2.10

MPU register map

Offset Register
MPU_TYPER
0x00
Reset Value
MPU_CTRL
0x04
Reset Value
MPU_RNR
0x08
Reset Value
MPU_RBAR
0x0C
Reset Value
MPU_RASR
0x10
Reset Value
MPU_RBAR_A1
(1)
0x14
Reset Value
MPU_RASR_A1
(2)
0x18
Reset Value
MPU_RBAR_A2
(1)
0x1C
Reset Value
MPU_RASR_A2
(2)
0x20
Reset Value
206/262

Table 44. MPU register map and reset values

Reserved
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
AP[2:0]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
AP[2:0]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
AP[2:0]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PM0214 Rev 10
IREGION[7:0] DREGION[7:0]
Reserved
Reserved
ADDR[31:N]...
S C B
ADDR[31:N]...
S C B
ADDR[31:N]...
S C B
Reserved
REGION[7:0]
SRD[7:0]
SRD[7:0]
SRD[7:0]
PM0214
SIZE
SIZE
SIZE