Coprocessor Access Control Register (Cpacr); Floating-Point Context Control Register (Fpccr) - ST STM32F3 Series Programming Manual

PM0214
4.6.1

Coprocessor access control register (CPACR)

Address offset (from SCB): 0x88
Reset value: 0x0000000
Required privilege: Privileged
The CPACR register specifies the access privileges for coprocessors.
31 30 29 28
15 14 13 12
Bits 31:24 Reserved. Read as Zero, Write Ignore.
Bits 23:20 CPn: [2n+1:2n] for n values 10 and 11. Access privileges for coprocessor n. The possible
values of each field are:
Bits 19:0 Reserved. Read as Zero, Write Ignore.
4.6.2

Floating-point context control register (FPCCR)

Address offset: 0x04
Reset value: 0xC000000
Required privilege: Privileged
The FPCCR register sets or returns FPU control data.
31 30 29 28
ASPEN LSPEN
rw rw
15 14 13 12
Reserved
27 26 25
Reserved
11 10 9
0b00: Access denied. Any attempted access generates a NOCP UsageFault.
0b01: Privileged access only. An unprivileged access generates a NOCP fault.
0b10: Reserved. The result of any access is Unpredictable.
0b11: Full access.
27 26 25
11 10 9
24 23 22
CP11
rw
8 7 6
Reserved
24 23 22
Reserved
8 7 6
BFRDY
rw rw
PM0214 Rev 10
Core peripherals
21 20 19 18
CP10
Reserved
rw
5 4 3 2
21 20 19 18
5 4 3 2
HFRDY
rw rw rw
17 16
1 0
17 16
1 0
USER
rw rw
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