Instruction Width Selection - ST STM32F3 Series Programming Manual

The STM32 Cortex-M4 instruction set
CMPGT R2, R3;
MOVGT R4, R5 ;
3.3.8

Instruction width selection

There are many instructions that can generate either a 16-bit encoding or a 32-bit encoding
depending on the specified operands and destination register. For some of these
instructions, you can force a specific instruction size by using an instruction width suffix.
The .W suffix forces a 32-bit instruction encoding. The .N suffix forces a 16-bit instruction
encoding.
If you specify an instruction width suffix and the assembler cannot generate an instruction
encoding of the requested width, it generates an error.
In some cases it might be necessary to specify the .W suffix, for example if the operand is
the label of an instruction or literal data, as in the case of branch instructions. The reason for
this is that the assembler might not automatically generate the right size encoding.
To use an instruction width suffix, place it immediately after the instruction mnemonic and
condition code, if any.
with the instruction width suffix.
Specific example 3: Instruction width selection
BCS.W label;
ADDS.W R0, R0, R1;
68/262
if 'greater than', compare R2 and R3, setting flags
if still 'greater than', do R4 = R5
Specific example 3: Instruction width selection
creates 32-bit instruction even for a short branch
creates a 32-bit instruction even though the same
; operation can be done by a 16-bit instruction
PM0214 Rev 10
PM0214
shows instructions